www.fairchildsemi.com ? 2010 fairchild semiconductor corporation www.fairchildsemi.com rev. 1.0.0 ? 12/23/10 AN-9721 li-ion battery charging basics, featuring the fan5400 / fan5420 family of pwm battery chargers overview today?s cell phones and other handheld devices provide ever increasing functionality and a richer user experience. as their functionality increases, the demand for battery power increases as well, which leads to adoption of higher- capacity batteries. these higher-capacity batteries require high-current charging solutions, which can best be served with efficient pwm chargers. lithium-ion battery charging is simplified with modern ic charging solutions. this application note provides a guide for how to use the fan5400 and fan5420 family of pwm chargers for high-current, fast-charging solutions to minimize the charging time while providing full compliance to modern battery safety specifications. lithium-ion battery charging basics a li-ion battery charger must provide a constant current to the battery until the battery voltage has reached its ?float? voltage. the battery can be thought of as a very large capacitor in series with a small resistance that represents its esr (equivalent series resistance). inside every battery pack is a protection ic, which features two back-to-back mosfets and an analog control circuit that prevents over- charging and over-discharging by monitoring the cell voltage and discharge current. the protection circuit is referred to as ?secondary protection? because the charging system must also ensure that the battery is not overcharged. the protection circuit provides a back-up safety circuit where overcharging is concerned. note: 1. for functional clarity, q1 and q2 are shown as pmos mosfets in series with the positive leg in figure 1. most protection circuits use nmos mosfets in the return leg instead for lower cost. the protection circuit?s resistan ce should be considered to be part of the battery?s total esr. protection circuit esr + cell control ? + q1 q2 figure 1. li-ion battery pack during charging, assuming the battery was not too deeply discharged, a constant current i charge is provided until the battery?s voltage has risen to v float . the maximum float voltage is typically specified by the battery manufacturer and is programmed into the charger ic through the oreg register setting. when v bat , the voltage at the battery terminals, reaches v float , i charge is limited by the cell voltage, v cell : esr cell bat charge r v v i ? = (1) as the internal cell voltage rises to approach v bat , the charge current continues to decrease until it reaches a termination current, which is commonly set for 10% of the full charge current. v oreg v b a t i short i charge pre- charge current regulation voltage regulation i ocharge v short i term 1c current i precharge v short v float figure 2. li-ion charge profile
AN-9721 application note ? 2010 fairchild semiconductor corporation www.fairchildsemi.com rev. 1.0.0 ? 12/23/10 2 once the termination current is set (assuming charge termination has been enabled by setting the te bit), the charger ic stops charging and waits for v bat to discharge to a recharge threshold. for the fan540x family, this threshold is 120mv below the oreg setting. deeply discharged cells q2 in the protection circuit is open if the cell was deeply discharged (v cell <2.7v). charging is therefore still possible by driving current into the pack through q2?s body diode. when fan540x determines that v bat <2.0v, it uses a 30ma linear current source to charge the battery beyond 2.0v before applying the full i charge in pwm mode. avoid over-voltage jeita 1 standards require that the battery voltage not exceed 4.25v. while battery manufacturers may suggest that the cell should be charged to 4.20v, the charging ic?s tolerance should be taken into account. with a v oreg tolerance over temperature of + 1% (42mv), a setting of 4.20v would produce a worst-case v float of 4.242v. this allows no room for temporary excursions above the oreg setting, which can occur during large system load transient events, such as a gsm pulse release. when charging a battery that?s already in cv (constant voltage) charge with a high current, a 2a gms pulse loads the battery and drives v bat down by about 500mv. this causes the charger ic to change from cv to cc (constant current) control, providing about 1.2a of current at the highest setting (fan540x). when the gsm pulse stops, the full 1.2a current flows into the battery briefly while the ic senses that v bat is rising and attempts to return to cv mode. some overshoot can occur (about 50mv, worst-case) while the cv voltage loop regains control. without software mitigation, this overshoot should be subtracted from 4.25v to determine the maximum v float voltage. the overshoot can, however, be mitigated in software, which is discussed later in this document. system startup typically, systems run from the battery. if the battery is missing or deeply discharged, the charger needs to be able to automatically and safely bring v bat up to a point where the system processor can wake up and manage battery charging. the fan5403 and fan5405 feature automatic charging. when a charger is connected and a battery is present, the fan5403 begins charging the battery without processor intervention with its default v float of 3.54v for t1 5min (nominally 12 minutes, 15 minutes maximum). if there is no battery when v bus first becomes valid, the fan5403 detects 1 a guide to the safe use of secondary lithium ion batteries in notebook- type personal computers , japan electronics and information technology industries association and battery association of japan, april 20, 2007. the battery?s absence and shuts down, preventing the system from running without a battery. this is useful when the system does not have another method of determining battery absence, since the charger typically cannot support gsm pulses or other high-load current events without a battery. running without a battery the fan5402 and fan5405 continue charging after v bus por with the default parameters, regulating the vbat line to 3.54v until the host processor issues commands or the 15 minute timer expires. in this way, the fan5402/05 can start the system without a battery. the fan5400 family?s soft-start function can interfere with the system supply with battery absent. the soft-start activates whenever voreg, iinlim, or iocharge are set from a lower to higher value. during soft-start, the i in limit drops to 100ma for about 1ms, unless i inlim is set to 11 (no limit). this could cause the system processor to fail to start. to avoid this behavior, use the following sequence: 1. set the otg pin high. when vbus is plugged in, i inlim is set to 500ma until the system processor powers up and can set parameters through i 2 c. 2. program the safety register 3. set i inlim to 11 (no limit). 4. set oreg to the desired value (typically 4.18). 5. reset the iolevel bit, then set iocharge. 6. set i inlim to 500ma if a usb source is connected or any other level that is preferred. during the initial system startup, while the charger ic is being programmed, the system current is limited to 340ma for 1ms during steps 4 and 5. this is the value of the soft-start i charge current used when i inlim is set to no limit. if the system powers up without a battery present, the cv bit should be set. when a battery is inserted, the cv bit clears. programming charge parameters the following recommendations are for general guidance only. for the correct charge parameter values, refer to the manufacturer?s recommended charging conditions for the specific battery in use. for the settings below, r sense is assumed to be 68m . watchdog timer once the processor has powered up, charging continues under processor control. as soon as the processor writes to i 2 c, the t 32s timer (minimum of 18 seconds) begins counting. if t 32s expires without being reset, all registers reset and charging continues with default settings in t1 5min mode. the processor should write a 1 to the tmr_rst bit at least every 15 seconds.
AN-9721 application note ? 2010 fairchild semiconductor corporation www.fairchildsemi.com rev. 1.0.0 ? 12/23/10 3 safety first the first register that should be programmed after the processor wakes up is the safety register. the safety register can only be programmed after either: ? power is first applied to the ic by plugging in a battery with sufficient charge to run the processor or ? v bus is plugged in, a battery is in place, and no i 2 c writes occurred before writing to the safety register. if the battery is removed during charging with the te bit set, the safety register is continually reset every two seconds. once a battery is inserted, the safety register should be the first register programmed. input power source the amount of power that can be drawn from a usb source is determined after a negotiation with the usb equipment. until that negotiation takes place, 100ma is the maximum current allowed. the otg pin allows the usb transceiver to set the maximum current during unattended charging. when otg is high, the input power source is limited to 500ma during unattended charging. when otg is low, the fan540x limits its input current to 100ma. after the processor takes control, it can determine whether the power source is usb or a dedicated charger (?wall wart?). typically the charger can supply more current than the 500ma allowed by usb. set the i inlimit bits based on the connected power source: table 1. input current limit power source i inlim usb 1.0 00 100ma usb 2.0 01 500ma usb 3.0 (2) 10 800ma wall wart 11 no limit note: 2. the usb 3.0 maximum available configured current is 900ma. some wall warts have limited power. the processor is typically unable to determine this until after charging starts. if the wall wart is unable to support the charging current, v bus begins to drop. the special charger loop scales back the charging current to prevent v bus from dropping lower than 4.53v, which draws as much current as the wall-wart is capable of producing, if required. the processor can determine if special charger loop is active by reading the sp bit. programming the float voltage (oreg) program v float by setting oreg, following the battery manufacturer?s recommended maximum float voltage, but subtracting 40mv for the charger ic?s oreg tolerance. ensure that the overshoot does not exceed the 4.25v level specified in the jeita standard. typically, programming orev to 4.16v should suffice. setting the charge current (i ocharge ) most battery manufacturers recommend the battery be charged at a rate not to exceed 1c. for example, an 800ma- hr battery can be charged with up to 800ma of current, which allows it to charge in about one hour. the fan540x limits the charging current for unattended charging to 340ma (23.1mv across r sense ). to achieve the desired charge current, set iocharge (reg4[6:4]) for the desired charging current, then reset the io_level bit (reg5[4]). termination settings the termination current is typically set for ~10% of the charge current. if the system load is connected at vbat, nominal system load current should be added to the battery termination current. if the te bit is set, when the voltage across r sense remains below the iterm setting for 32ms, charging stops. for example, with an 800ma-hr battery and a 200ma maximum system load, iterm should be set for 300ma. preventing charging at temperature extremes the jeita specification prohibits charging below a minimum temperature (typically 0c) and above a maximum temperature (typically 60c). full current and rated v float charging is only allowed inside an even more narrow range (typically above +10c and below 45c). the allowable temperature, v float , and charge currents should be specified by the battery manufacturer. the fan540x ic?s can automatically charge when v bus comes up. the default charge current is limited to 340ma and default v float is limited to 3.54v, which is within the boundaries of the reduced i charge and v float for batteries that are inside the wider temperature range of 0c to 60c. if the battery temperature is outside the 0c to 60c, charging can be inhibited by using the disable pin with a low-cost temperature switch ic. the temperature sensing ic can be powered from either pmid (which is protected from high-voltage excursions) or from v reg , if the ic can run from a 1.8v supply.
AN-9721 application note ? 2010 fairchild semiconductor corporation www.fairchildsemi.com rev. 1.0.0 ? 12/23/10 4 seiko instrument?s s-5842adaaq-i6t1g temperature sensor provides a logic 1 on its open-drain detl pin which, when connected to the fan54xx?s disable pin with a pull-up resistor to vreg, inhibits charging when outside the allowable temperature range. disable pmid fan5403 s-5842adaaq-i6t1g 100k vreg figure 3. temperature limi t ic inhibits charging below 0c and above 60c if a thermistor is provided inside the battery pack, the circuit in figure 4 raises the disable when battery temperature is outside the 0c to 60c. disable u1a 4.7k = 3500 vreg 11k 6k 2k 10k u1b 100k figure 4. disabling charge at temperature extremes using a thermistor some battery vendors allow some charging outside the jeita-recommended temperature range if charge current, time, and voltage are restricted. consult the battery vendor for safe charging recommendations. related datasheets fan5400 family fan5420 family. s-5842a series datasheet, seiko instruments: http://www.sii-ic.com disclaimer fairchild semiconductor reserves the right to make changes without further notice to any products herein to improve reliability, function, or design. fairchild does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. life support policy fairchild?s products are not authorized for use as critical components in life support devices or systems without the express written approval of the president of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. a critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
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